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<dblpperson name="Kumar N. Lalgudi" pid="92/5" n="9">
<person key="homepages/92/5" mdate="2009-06-08">
<author pid="92/5">Kumar N. Lalgudi</author>
</person>
<r><inproceedings key="conf/aspdac/SaxenaLGR05" mdate="2025-01-19">
<author pid="36/366">Prashant Saxena</author>
<author pid="92/5">Kumar N. Lalgudi</author>
<author pid="15/4527">Hans J. Greub</author>
<author pid="w/JanetMeilingWang">Janet Meiling Wang Roveda</author>
<title>A perturbation-aware noise convergence methodology for high frequency microprocessors.</title>
<pages>717-722</pages>
<year>2005</year>
<crossref>conf/aspdac/2005</crossref>
<booktitle>ASP-DAC</booktitle>
<ee>https://doi.org/10.1145/1120725.1121002</ee>
<ee>https://doi.org/10.1109/ASPDAC.2005.1466441</ee>
<ee>https://www.wikidata.org/entity/Q130956453</ee>
<url>db/conf/aspdac/aspdac2005.html#SaxenaLGR05</url>
</inproceedings>
</r>
<r><article key="journals/todaes/LalgudiPP00" mdate="2018-11-06">
<author pid="92/5">Kumar N. Lalgudi</author>
<author pid="73/197">Marios C. Papaefthymiou</author>
<author pid="p/MiodragPotkonjak">Miodrag Potkonjak</author>
<title>Optimizing computations for effective block-processing.</title>
<pages>604-630</pages>
<year>2000</year>
<volume>5</volume>
<journal>ACM Trans. Design Autom. Electr. Syst.</journal>
<number>3</number>
<ee>https://doi.org/10.1145/348019.348304</ee>
<url>db/journals/todaes/todaes5.html#LalgudiPP00</url>
</article>
</r>
<r><article key="journals/ipl/LalgudiP97" mdate="2017-05-26">
<author pid="92/5">Kumar N. Lalgudi</author>
<author pid="73/197">Marios C. Papaefthymiou</author>
<title>Computing Strictly-Second Shortest Paths.</title>
<pages>177-181</pages>
<year>1997</year>
<volume>63</volume>
<journal>Inf. Process. Lett.</journal>
<number>4</number>
<url>db/journals/ipl/ipl63.html#LalgudiP97</url>
<ee>https://doi.org/10.1016/S0020-0190(97)00122-1</ee>
</article>
</r>
<r><article key="journals/tcad/LalgudiP97" mdate="2020-09-24">
<author pid="92/5">Kumar N. Lalgudi</author>
<author pid="73/197">Marios C. Papaefthymiou</author>
<title>Retiming edge-triggered circuits under general delay models.</title>
<pages>1393-1408</pages>
<year>1997</year>
<volume>16</volume>
<journal>IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.</journal>
<number>12</number>
<ee>https://doi.org/10.1109/43.664222</ee>
<url>db/journals/tcad/tcad16.html#LalgudiP97</url>
</article>
</r>
<r><inproceedings key="conf/dac/LalgudiPP96" mdate="2018-11-06">
<author pid="92/5">Kumar N. Lalgudi</author>
<author pid="73/197">Marios C. Papaefthymiou</author>
<author pid="p/MiodragPotkonjak">Miodrag Potkonjak</author>
<title>Optimizing Systems for Effective Block-Processing: The <i>k</i>-Delay Problem.</title>
<pages>714-719</pages>
<year>1996</year>
<crossref>conf/dac/1996</crossref>
<booktitle>DAC</booktitle>
<ee>https://doi.org/10.1145/240518.240653</ee>
<url>db/conf/dac/dac96.html#LalgudiPP96</url>
</inproceedings>
</r>
<r><inproceedings key="conf/islped/PapaefthymiouL96" mdate="2018-11-30">
<author pid="73/197">Marios C. Papaefthymiou</author>
<author pid="92/5">Kumar N. Lalgudi</author>
<title>Fixed-phase retiming for low power design.</title>
<pages>259-264</pages>
<year>1996</year>
<crossref>conf/islped/1996</crossref>
<booktitle>ISLPED</booktitle>
<ee>https://doi.org/10.1109/LPE.1996.547519</ee>
<ee>https://dl.acm.org/citation.cfm?id=252615</ee>
<url>db/conf/islped/islped1996.html#PapaefthymiouL96</url>
</inproceedings>
</r>
<r><inproceedings key="conf/arvlsi/LalgudiP95" mdate="2023-03-24">
<author pid="92/5">Kumar N. Lalgudi</author>
<author pid="73/197">Marios C. Papaefthymiou</author>
<title>Efficient retiming under a general delay model.</title>
<pages>368-382</pages>
<year>1995</year>
<crossref>conf/arvlsi/1995</crossref>
<booktitle>ARVLSI</booktitle>
<ee>https://doi.org/10.1109/ARVLSI.1995.515633</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/ARVLSI.1995.515633</ee>
<url>db/conf/arvlsi/arvlsi1995.html#LalgudiP95</url>
</inproceedings>
</r>
<r><inproceedings key="conf/dac/LalgudiP95" mdate="2018-11-06">
<author pid="92/5">Kumar N. Lalgudi</author>
<author pid="73/197">Marios C. Papaefthymiou</author>
<title>DELAY: An Efficient Tool for Retiming with Realistic Delay Modeling.</title>
<pages>304-309</pages>
<year>1995</year>
<crossref>conf/dac/1995</crossref>
<booktitle>DAC</booktitle>
<ee>https://doi.org/10.1145/217474.217546</ee>
<url>db/conf/dac/dac95.html#LalgudiP95</url>
</inproceedings>
</r>
<r><inproceedings key="conf/vlsid/LalgudiBA93" mdate="2023-03-24">
<author pid="92/5">Kumar N. Lalgudi</author>
<author pid="56/5534">Debashis Bhattacharya</author>
<author pid="65/6018">Prathima Agrawal</author>
<title>Architecture of a Min-Max Simulator on MARS.</title>
<pages>246-249</pages>
<year>1993</year>
<crossref>conf/vlsid/1993</crossref>
<booktitle>VLSI Design</booktitle>
<url>db/conf/vlsid/vlsid1993.html#LalgudiBA93</url>
<ee>https://doi.org/10.1109/ICVD.1993.669689</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/ICVD.1993.669689</ee>
</inproceedings>
</r>
<coauthors n="7" nc="3">
<co c="1"><na f="a/Agrawal:Prathima" pid="65/6018">Prathima Agrawal</na></co>
<co c="1"><na f="b/Bhattacharya:Debashis" pid="56/5534">Debashis Bhattacharya</na></co>
<co c="0"><na f="g/Greub:Hans_J=" pid="15/4527">Hans J. Greub</na></co>
<co c="2"><na f="p/Papaefthymiou:Marios_C=" pid="73/197">Marios C. Papaefthymiou</na></co>
<co c="2"><na f="p/Potkonjak:Miodrag" pid="p/MiodragPotkonjak">Miodrag Potkonjak</na></co>
<co c="0" n="2"><na f="r/Roveda:Janet" pid="w/JanetMeilingWang">Janet Roveda</na><na>Janet Meiling Wang Roveda</na></co>
<co c="0"><na f="s/Saxena:Prashant" pid="36/366">Prashant Saxena</na></co>
</coauthors>
</dblpperson>

