{"id":"https://openalex.org/W2102665528","doi":"https://doi.org/10.1109/async.2004.1299295","title":"Synthesis of speed independent circuits based on decomposition","display_name":"Synthesis of speed independent circuits based on decomposition","publication_year":2004,"publication_date":"2004-06-10","ids":{"openalex":"https://openalex.org/W2102665528","doi":"https://doi.org/10.1109/async.2004.1299295","mag":"2102665528"},"language":"en","primary_location":{"id":"doi:10.1109/async.2004.1299295","is_oa":false,"landing_page_url":"https://doi.org/10.1109/async.2004.1299295","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"10th International Symposium on Asynchronous Circuits and Systems, 2004. Proceedings.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5018623844","display_name":"Tomoki Yoneda","orcid":"https://orcid.org/0000-0002-9804-0240"},"institutions":[{"id":"https://openalex.org/I184597095","display_name":"National Institute of Informatics","ror":"https://ror.org/04ksd4g47","country_code":"JP","type":"facility","lineage":["https://openalex.org/I1319490839","https://openalex.org/I184597095","https://openalex.org/I4210158934"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Yoneda","raw_affiliation_strings":["National Institute of Information, Japan","(National Institute of Informatics, Tokyo, Japan)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Institute of Information, Japan","institution_ids":["https://openalex.org/I184597095"]},{"raw_affiliation_string":"(National Institute of Informatics, Tokyo, Japan)","institution_ids":["https://openalex.org/I184597095"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068014352","display_name":"H. Onda","orcid":null},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"H. Onda","raw_affiliation_strings":["Tokyo Institute of Technology, Japan","Tokyo Inst. of Tech"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology, Japan","institution_ids":["https://openalex.org/I114531698"]},{"raw_affiliation_string":"Tokyo Inst. of Tech","institution_ids":["https://openalex.org/I114531698"]}]},{"author_position":"last","author":{"id":null,"display_name":"C. Myers","orcid":null},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C. Myers","raw_affiliation_strings":["University of Utah, USA","University of Utah  USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Utah, USA","institution_ids":["https://openalex.org/I223532165"]},{"raw_affiliation_string":"University of Utah  USA","institution_ids":["https://openalex.org/I223532165"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":5.3776,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.96528471,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"2549","issue":null,"first_page":"135","last_page":"145"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.7613635063171387},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6876283288002014},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.66217440366745},{"id":"https://openalex.org/keywords/state-space","display_name":"State space","score":0.63686603307724},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.6237826943397522},{"id":"https://openalex.org/keywords/decomposition","display_name":"Decomposition","score":0.5902843475341797},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.578429102897644},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.5269333124160767},{"id":"https://openalex.org/keywords/decomposition-method","display_name":"Decomposition method (queueing theory)","score":0.46804308891296387},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.43604856729507446},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4075475335121155},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.34598565101623535},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.32852840423583984},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.22435835003852844},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.18475991487503052},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.16636425256729126},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1600717008113861},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14962247014045715},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09994608163833618},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.06314969062805176}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.7613635063171387},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6876283288002014},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.66217440366745},{"id":"https://openalex.org/C72434380","wikidata":"https://www.wikidata.org/wiki/Q230930","display_name":"State space","level":2,"score":0.63686603307724},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.6237826943397522},{"id":"https://openalex.org/C124681953","wikidata":"https://www.wikidata.org/wiki/Q339062","display_name":"Decomposition","level":2,"score":0.5902843475341797},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.578429102897644},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.5269333124160767},{"id":"https://openalex.org/C2778258933","wikidata":"https://www.wikidata.org/wiki/Q16918986","display_name":"Decomposition method (queueing theory)","level":2,"score":0.46804308891296387},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.43604856729507446},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4075475335121155},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.34598565101623535},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.32852840423583984},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.22435835003852844},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.18475991487503052},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.16636425256729126},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1600717008113861},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14962247014045715},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09994608163833618},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.06314969062805176},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/async.2004.1299295","is_oa":false,"landing_page_url":"https://doi.org/10.1109/async.2004.1299295","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"10th International Symposium on Asynchronous Circuits and Systems, 2004. Proceedings.","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.137.8042","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.137.8042","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://research.nii.ac.jp/~yoneda/nutas/async04.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.418.1606","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.418.1606","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.async.elen.utah.edu/publications/ASYNC04.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.41999998688697815,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320322725","display_name":"China Scholarship Council","ror":"https://ror.org/04atp4p48"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W99603660","https://openalex.org/W1539546888","https://openalex.org/W1554812212","https://openalex.org/W1577323490","https://openalex.org/W1665361481","https://openalex.org/W1900351535","https://openalex.org/W1902783639","https://openalex.org/W2035560780","https://openalex.org/W2083580665","https://openalex.org/W2099620341","https://openalex.org/W2100382727","https://openalex.org/W2107366836","https://openalex.org/W2120750303","https://openalex.org/W2123021615","https://openalex.org/W2123853588","https://openalex.org/W2139439309","https://openalex.org/W2154764836","https://openalex.org/W2156956883","https://openalex.org/W2158415867","https://openalex.org/W2160823654","https://openalex.org/W2291470608","https://openalex.org/W2407212955","https://openalex.org/W2426158416","https://openalex.org/W4242530255","https://openalex.org/W4298011152","https://openalex.org/W6604042352","https://openalex.org/W6632136554","https://openalex.org/W6637168539","https://openalex.org/W6674946643","https://openalex.org/W6682620923","https://openalex.org/W6682910010","https://openalex.org/W6683394555"],"related_works":["https://openalex.org/W2358223609","https://openalex.org/W4240239975","https://openalex.org/W2371073331","https://openalex.org/W4214585722","https://openalex.org/W2364544765","https://openalex.org/W2384756109","https://openalex.org/W2535130387","https://openalex.org/W1563426197","https://openalex.org/W2021934043","https://openalex.org/W1679970298"],"abstract_inverted_index":{"This":[0],"work":[1],"presents":[2],"a":[3,60,135],"decomposition":[4],"method":[5,23,130],"for":[6,52,78,118],"speed-independent":[7],"circuit":[8,77,94,144],"design":[9],"that":[10,89],"is":[11,56,81,96],"capable":[12],"of":[13,18,41,63,92,137],"significantly":[14],"reducing":[15],"the":[16,32,39,48,71,90,93,101,105],"cost":[17],"synthesis.":[19],"In":[20],"particular,":[21],"this":[22,53,79,85],"synthesizes":[24],"each":[25],"output":[26,40,80],"individually.":[27],"It":[28],"begins":[29],"by":[30],"contracting":[31],"STG":[33,55,72],"to":[34,58,73,115],"include":[35],"only":[36],"transitions":[37],"on":[38],"interest":[42],"and":[43],"its":[44],"trigger":[45],"signals.":[46],"Next,":[47],"reachable":[49,107],"state":[50,108,121],"space":[51,122],"contracted":[54],"analyzed":[57],"determine":[59],"minimal":[61],"number":[62],"additional":[64],"signals":[65],"which":[66,119],"must":[67],"be":[68,113,125],"reintroduced":[69],"into":[70],"obtain":[74],"CSC.":[75],"The":[76,128],"then":[82],"synthesized":[83],"from":[84,104],"STG.":[86],"Results":[87],"show":[88],"quality":[91],"implementation":[95],"nearly":[97],"as":[98,100,134],"good":[99],"one":[102],"found":[103],"full":[106,120],"space,":[109],"but":[110],"it":[111],"can":[112],"applied":[114],"find":[116],"circuits":[117],"methods":[123],"cannot":[124],"successfully":[126],"applied.":[127],"proposed":[129],"has":[131],"been":[132],"implemented":[133],"part":[136],"our":[138],"tool":[139],"nutas":[140],"(Nii-Utah":[141],"timed":[142],"asynchronous":[143],"synthesis":[145],"system).":[146]},"counts_by_year":[{"year":2014,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
