{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,15]],"date-time":"2026-04-15T18:26:54Z","timestamp":1776277614952,"version":"3.50.1"},"reference-count":114,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2021,5,1]],"date-time":"2021-05-01T00:00:00Z","timestamp":1619827200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61772518"],"award-info":[{"award-number":["61772518"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"name":"National 973 program of China","award":["2013CB338001"],"award-info":[{"award-number":["2013CB338001"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Dependable and Secure Comput."],"published-print":{"date-parts":[[2021,5,1]]},"DOI":"10.1109\/tdsc.2019.2897666","type":"journal-article","created":{"date-parts":[[2019,2,5]],"date-time":"2019-02-05T19:51:15Z","timestamp":1549396275000},"page":"1196-1213","source":"Crossref","is-referenced-by-count":9,"title":["Mimosa: Protecting Private Keys Against Memory Disclosure Attacks Using Hardware Transactional Memory"],"prefix":"10.1109","volume":"18","author":[{"given":"Congwu","family":"Li","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8205-5616","authenticated-orcid":false,"given":"Le","family":"Guan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1508-4879","authenticated-orcid":false,"given":"Jingqiang","family":"Lin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8196-2436","authenticated-orcid":false,"given":"Bo","family":"Luo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Quanwei","family":"Cai","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jiwu","family":"Jing","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jing","family":"Wang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2016.2631548"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2015.8"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ARES.2016.13"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-44371-2_25"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-44709-3_14"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-48324-4_11"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.14722\/ndss.2014.23125"},{"key":"ref36","first-page":"217","article-title":"Strong and efficient cache side-channel protection using hardware transactional memory","author":"gruss","year":"2017","journal-title":"Proc USENIX Conf Security Symp"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/ARES.2013.52"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/2897845.2897924"},{"key":"ref28","first-page":"61","article-title":"Eternal sunshine of the spotless machine: Protecting privacy with ephemeral channels","author":"dunn","year":"2012","journal-title":"Proc USENIX Conf Operating Syst Des Implementation"},{"key":"ref27","first-page":"51","article-title":"Prime+Abort: A timer-free high-precision L3 cache attack using Intel TSX","author":"disselkoen","year":"2017","journal-title":"Proc USENIX Conf Security Symp"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/2523649.2523656"},{"key":"ref20","first-page":"279","article-title":"Thread-safe dynamic binary translation using transactional memory","author":"chung","year":"2008","journal-title":"Proc IEEE 14th Int Symp High Perform Comput Archit"},{"key":"ref22","first-page":"7","article-title":"PointGuardTM: Protecting pointers from buffer overflow vulnerabilities","author":"cowan","year":"2003","journal-title":"Proc 12th Conf Usenix Security Symp"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/2694344.2694380"},{"key":"ref24","article-title":"Linux kernel vulnerability statistics","year":"2014"},{"key":"ref23","first-page":"5","article-title":"StackGuard: Automatic adaptive detection and prevention of buffer-overflow attacks","author":"cowan","year":"1998","journal-title":"The Proceedings of the 7th USENIX Security Symposium"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/1508244.1508263"},{"key":"ref101","article-title":"Coredump hole in imapd and ipop3d in Slackware 3.4","author":"van dijk","year":"1998"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/1168857.1168900"},{"key":"ref100","article-title":"Trusted platform module 2.0: A brief introduction","year":"2016"},{"key":"ref50","article-title":"Desktop 4th generation Intel Core processor family","year":"2014"},{"key":"ref51","article-title":"Intel 64 and IA-32 architectures optimization reference manual","year":"2014"},{"key":"ref59","article-title":"High-speed RSA implementation","author":"koc","year":"1994"},{"key":"ref58","first-page":"39","article-title":"kGuard: Lightweight kernel protection against return-to-user attacks","author":"kemerlis","year":"2012","journal-title":"Proc USENIX Conf Security Symp"},{"key":"ref57","first-page":"476","article-title":"Improving in-memory database index performance with Intel transactional synchronization extensions","author":"karnagel","year":"2014","journal-title":"Proc IEEE 20th Int Symp High Perform Comput Archit"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1145\/3052973.3053034"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1145\/2976749.2978321"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.12"},{"key":"ref53","article-title":"Intel software guard extensions programming reference","year":"2014"},{"key":"ref52","article-title":"Intel 64 and IA-32 architectures software developer’s manual","year":"2014"},{"key":"ref40","article-title":"Linux kernel 2.6 fun, Windoze is a joke","author":"guninski","year":"2005"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1016\/j.diin.2016.01.009"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-36095-4_2"},{"key":"ref6","article-title":"Firewire: All your memory are belong to us","author":"becher","year":"2005","journal-title":"Proc CanSecWest Conf"},{"key":"ref5","first-page":"267","article-title":"Shielding applications from an untrusted cloud with Haven","author":"baumann","year":"2014","journal-title":"Proc USENIX Symp on Operating System Design and Implementation"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1554339.1554350"},{"key":"ref49","article-title":"Intel advanced encryption standard (AES) new instructions set","year":"2012"},{"key":"ref7","article-title":"Cache-timing attacks on AES","author":"bernstein","year":"2004"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/1455770.1455800"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1145\/1950365.1950398"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1993.698569"},{"key":"ref48","article-title":"Chapter 8: Intel transactional memory synchronization extensions","year":"2012","journal-title":"Intel Architecture Instruction Set Extensions Programming Reference"},{"key":"ref47","article-title":"Cardbus bus-mastering: 0wning the laptop","author":"hulton","year":"2006","journal-title":"Annu ShmooCon Conv"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2004.1310767"},{"key":"ref41","first-page":"45","article-title":"Lest we remember: Cold boot attacks on encryption keys","author":"halderman","year":"2008","journal-title":"Proc Usenix Security Symp"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2007.77"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1145\/1065944.1065952"},{"key":"ref73","article-title":"CWE-226: Sensitive information uncleared before release","year":"2013"},{"key":"ref72","article-title":"CWE-212: Improper cross-boundary removal of sensitive data","year":"2013"},{"key":"ref71","doi-asserted-by":"publisher","DOI":"10.1145\/1357010.1352625"},{"key":"ref70","first-page":"325","article-title":"Transactional memory support for scalable and transparent parallelization of multiplayer games","author":"lupei","year":"2010","journal-title":"Proc 15th ACM SIGPLAN Symp Principles Practice Parallel Program"},{"key":"ref76","first-page":"17","article-title":"TRESOR runs encryption securely outside RAM","author":"m\u00fcller","year":"2011","journal-title":"Proc USENIX Conf Security"},{"key":"ref77","article-title":"CVE-2014–0069","year":"2014"},{"key":"ref74","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2006.1598134"},{"key":"ref75","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-45719-2_2"},{"key":"ref78","article-title":"CVE-2014–0160","year":"2014"},{"key":"ref79","article-title":"CVE-2014–4653","year":"2014"},{"key":"ref60","article-title":"Spectre attacks: Exploiting speculative execution","author":"kocher","year":"2018"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.1145\/1122971.1123003"},{"key":"ref61","article-title":"WU-FTPD core dump vulnerability (the old patch doesn’t work)","author":"kolontsov","year":"1997"},{"key":"ref63","article-title":"CAN-2005–0400: Information leak in the Linux kernel ext2 implementation","author":"lafon","year":"2005"},{"key":"ref64","first-page":"523","article-title":"Hacking in darkness: Return-oriented programming against secure enclaves","author":"lee","year":"2017","journal-title":"Proc USENIX Conf Security Symp"},{"key":"ref65","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-01950-1_47"},{"key":"ref66","doi-asserted-by":"publisher","DOI":"10.1145\/2046707.2046711"},{"key":"ref67","article-title":"Meltdown","author":"lipp","year":"2018"},{"key":"ref68","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2015.43"},{"key":"ref69","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2014.6835951"},{"key":"ref2","article-title":"Advanced synchronization facility, proposed architectural specification (revision 2.1)","year":"2009"},{"key":"ref1","first-page":"271","article-title":"Cache based remote timing attack on the AES","author":"aciicmez","year":"2007","journal-title":"Proc Cryptographers' Track RSA Conf Topics Cryptology"},{"key":"ref95","article-title":"Security dynamics FTP server core problem","year":"1997"},{"key":"ref109","doi-asserted-by":"publisher","DOI":"10.1145\/2503210.2503232"},{"key":"ref94","doi-asserted-by":"publisher","DOI":"10.1145\/2810103.2813608"},{"key":"ref108","first-page":"719","article-title":"Flush+reload: A high resolution, low noise, L3 cache side-channel attack","author":"yarom","year":"2014","journal-title":"Proc Usenix Security Symp"},{"key":"ref93","doi-asserted-by":"publisher","DOI":"10.1145\/2076732.2076743"},{"key":"ref107","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2015.45"},{"key":"ref92","doi-asserted-by":"publisher","DOI":"10.1145\/2897845.2897885"},{"key":"ref106","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-45744-4_22"},{"key":"ref91","doi-asserted-by":"publisher","DOI":"10.14722\/ndss.2017.23193"},{"key":"ref105","doi-asserted-by":"publisher","DOI":"10.1145\/2382196.2382216"},{"key":"ref90","doi-asserted-by":"publisher","DOI":"10.1007\/s004460050028"},{"key":"ref104","doi-asserted-by":"crossref","first-page":"127","DOI":"10.1145\/2370816.2370836","article-title":"Evaluation of Blue Gene\/Q Hardware Support for Transactional Memories","author":"amy wang","year":"2012","journal-title":"In International Conference on Parallel Architectures and Compilation Techniques (PACT)"},{"key":"ref103","article-title":"Linux profiling with performance counters","author":"vitillo","year":"2014"},{"key":"ref102","doi-asserted-by":"publisher","DOI":"10.1145\/2660267.2660316"},{"key":"ref111","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2016.13"},{"key":"ref112","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-33630-5_20"},{"key":"ref110","doi-asserted-by":"publisher","DOI":"10.1109\/DSNW.2013.6615523"},{"key":"ref98","doi-asserted-by":"publisher","DOI":"10.1145\/2810103.2813692"},{"key":"ref99","article-title":"Intel software development emulator","author":"tal","year":"2012"},{"key":"ref96","first-page":"1","article-title":"A primitive for revealing stealthy peripheral-based attacks on the computing platform’s main memory","author":"stewin","year":"2013","journal-title":"Proc Int Workshop Recent Advances Intrusion Detection"},{"key":"ref97","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-37300-8_2"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/2420950.2420961"},{"key":"ref11","article-title":"Firewire-based physical security attacks on Windows 7, EFS and BitLocker","author":"bock","year":"2009"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/11894063_16"},{"key":"ref13","first-page":"11","article-title":"Software grand exposure: SGX cache attacks are practical","author":"brasser","year":"2017","journal-title":"Proc 11th USENIX Conf Offensive Technol"},{"key":"ref14","article-title":"Scrash: A system for generating secure crash information","author":"broadwell","year":"2003","journal-title":"Proc Usenix Security Symp"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1016\/j.comnet.2005.01.010"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/1133981.1133983"},{"key":"ref82","article-title":"Frozencache: Mitigating cold-boot attacks for full-disk-encryption software","author":"pabel","year":"2010","journal-title":"Chaos Communication Congress"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/3052973.3053007"},{"key":"ref81","article-title":"How not to protect PCs from power analysis","author":"oren","year":"2006","journal-title":"Rump Session of Crypto '90"},{"key":"ref18","first-page":"22","article-title":"Understanding data lifetime via whole system simulation","author":"chow","year":"2004","journal-title":"Proc 13th Conf Usenix Security Symp"},{"key":"ref84","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2008.24"},{"key":"ref19","first-page":"22","article-title":"Shredding your garbage: Reducing data lifetime through secure deallocation","author":"chow","year":"2005","journal-title":"Proc 14th Conf USENIX Security Symp"},{"key":"ref83","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-14597-1_3"},{"key":"ref114","doi-asserted-by":"publisher","DOI":"10.1145\/1594835.1504183"},{"key":"ref113","first-page":"482","article-title":"PhiRSA: Exploiting the computing power of vector instructions on Intel Xeon Phi for RSA","author":"zhao","year":"2016","journal-title":"Proc Int Conf Selected Areas Cryptography"},{"key":"ref80","doi-asserted-by":"publisher","DOI":"10.1145\/1449764.1449780"},{"key":"ref89","doi-asserted-by":"publisher","DOI":"10.1145\/1294261.1294294"},{"key":"ref85","doi-asserted-by":"publisher","DOI":"10.1145\/1315245.1315260"},{"key":"ref86","article-title":"Cryptographic key recovery from Linux memory dumps","author":"pettersson","year":"2007","journal-title":"Chaos Communication Camp"},{"key":"ref87","doi-asserted-by":"publisher","DOI":"10.1145\/3007788.3007796"},{"key":"ref88","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2015.10"}],"container-title":["IEEE Transactions on Dependable and Secure Computing"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8858\/9430778\/08634944.pdf?arnumber=8634944","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:05:13Z","timestamp":1642003513000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8634944\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,5,1]]},"references-count":114,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tdsc.2019.2897666","relation":{},"ISSN":["1545-5971","1941-0018","2160-9209"],"issn-type":[{"value":"1545-5971","type":"print"},{"value":"1941-0018","type":"electronic"},{"value":"2160-9209","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,5,1]]}}}